Aspects are related generally to computer-based communication systems, and more specifically to cut-through bridge error isolation in a computer system.
Many types of communication protocols have been defined in the art. One such example, peripheral component interconnect express (PCIe), is a component level interconnect standard that defines a bi-directional communication protocol for transactions between input/output (I/O) adapters and host systems. PCIe communications are encapsulated in packets according to the PCIe standard for transmission on a PCIe bus. Packets originating at I/O adapters and ending at host systems are referred to as upbound packets. Packets originating at host systems and terminating at I/O adapters are referred to as downbound packets. PCIe transactions include a request packet and, if required, a completion packet (also referred to herein as a “response packet”) in the opposite direction. The PCIe topology is based on point-to-point unidirectional links that are paired (e.g., one upbound link, one downbound link) to form the PCIe bus.
Prior to transmission of PCIe packets and/or other packetized communication formats within and/or between computer systems, an internal bus protocol may be used within a controller including a cut-through bridge design, where a single packet can be stretched across multiple stages of processing. In some instances, control signal violations at an upstream interface can cause downstream logic to go into an invalid state. Examples include receiving too few data beats, an end assertion missing, and the like. While error checking may be performed at each stage of a cut-through bridge, this results in complex logic and duplicate error checks. Thus, there is a need to provide efficient error isolation for cut-through bridges in a computer system.